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1. General purpose register
The register that stores general data is called general register ,8086CPU yes 14 Registers , They are all 16 position （bit） Of , It can be stored 2 Bytes . The general register is AX to DX Four . To ensure upward compatibility , Each of the four registers can be divided into two independent registers 8 Bit register .
for example AX Can be divided into AH and AL, That's high 8 Bit and low 8 Two registers of bit .
2. Storage of words
CPU Two sizes of data can be processed at one time .
The first is bytes （byte）, from 8bit form , Can exist 8 Bit register . The other is character （word）, It consists of two parts byte form , They are called the high and low bits of the word, respectively .
One word exists 16 Bit register , High byte and low byte are naturally stored in high byte 8 Bit and low 8 Bit register . for example AH and AL Data in , It can be regarded as a high-resolution image of font data 8 Bit and low 8 position , It can also be seen as two separate bytes （byte） Type data .
16 Binary can be represented by two digits 8 digit , such as 20000 finish writing sth. 4E20 It means that the data is generated by 4E and 20 form . If AX Store it in the library , that AH Middle is 4E,AL In China, it is 20.
3. Assembly instruction
Several basic assembly instructions :
mov ax,18: take 18 Input register AX
mov ah,78: take 78 Input register AH
add ax,8: Register AX The value in plus 8
mov ax,bx: use BX Numerical coverage in AX
add ax,bx: use BX and AX Covering the sum of values in AX
It is worth noting that the numerical value exceeds the maximum representation range , If you are using AL, Then the excess will not be stored in the AH, Because the two registers are regarded as independent units . But if you use AX, So when the value exceeds 8 After bit maximum range , The excess is stored in the high register .
How to use less than 4 Programming calculation of assembly instructions 2 Of 4 Power ?
Using the iterative method , Write the assembly statement ：
mov ax,2
add ax,ax
add ax,ax
add ax,ax
4. Physical address
CPU Before sending physical address through address bus , This address must be formed internally first .
8086 yes 16 Positional CPU, in other words , It can be handled internally at one time , What is the maximum length of information transmitted and temporarily stored 16 Positional .8086 What is the address bus width 20, If the address is sent directly from the inside , It can only be delivered 16 position , So it has to be done first CPU Internal composite address .
8086 Use physical address = Segment address *16+ Offset address to synthesize physical address . yes 16 Number of decimal , Take it 16 It's like moving to the left 1 position , This is equivalent to 2 The number of decimal is shifted to the left 4 position . So its logical meaning is ,16 The base address of the bit （ Binary ） Move left 4 position , So it can be expressed indirectly 20 Bit address .
Two 16 The address of bit is sent to address adder through internal bus , After synthesized by address adder , Through the input and output control circuit to the address bus .
Different segment addresses + Offset addresses can be combined into the same physical address .
5. Segment register
The segment address is stored in the segment register ,8086CPU Among them 4 Segment registers ：CS,DS,SS,ES.CS Combining instruction pointer register IP, Indicates the current instruction address to read . Can change CS and IP The instruction of the content is called the transfer instruction . as jump
2AE3：3, After implementation CS The content is 2AE3H,IP The content is 0003H, jump ax: take ax The data in the register is passed to the CS.
Instructions and data are binary numbers without any difference in memory , Only according to the storage location to distinguish ,CS：IP The contents of are treated as instructions .
6. Code snippet
A set of memory units can be defined as a code segment , In order to make CPU Execute this code , Need to let CS：IP Points to the first address of the code segment . Then execute the instructions in the code snippet in turn .
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