RISCV--汇编指令

la a0, _start //把 _start地址放到a0

li a1, 1 // 把立即数1 放到a1

slli a1, a1, 29 //这里的值是 a1的值<<29 值放到a1

bleu a1, a0, _start0800 // a1 < a0,跳转到_start0800

srli a1, a1, 2 // a1 >>2 a1的值 右移2 后值放到a1

lw: 从数据存储器中取数据写进寄存器

sw:将寄存器中的值写入数据存储器

*********************************************************************************

csrr rd,csr 读一个csr中的值到rd中，相当于  csrrs rd,csr,zero

csrw csr ,rs1 写rs1寄存器的值到csr中，相当于csrrw zero,csr,rs1

csrc csr, rs1 根据rs1中的值按位对csr的值清0，相当于csrrc zero,csr,rs1

csrs csr, rs1 根据rs1的值按位对csr的值置1，相当于csrrs zero,csr,rs1

以 i 结尾的伪指令，都是立即数指令，用立即数替换了rs1，操作是一致的。

Control and Status Register Instructions （CSR）

CSR Instructions

CSRRW (Atomic Read/Write CSR) ：CSRRW reads the old value of the CSR,
zero-extends the value to XLEN bits, then writes it to integer registerrd

The initial value in rs1 is written to the CSR

 

CSRRS (Atomic Read and Set Bits in CSR) ：

The initial value in integer register rs1 is treated as a bit mask that
specifies bit positions to be set in the CSR

Any bit that is high in rs1 will cause the corresponding bit to be set in the
CSR

 

CSRRC (Atomic Read and Clear Bits in CSR) :

The initial value in integer register rs1 is treated as a bit mask that
specifies bit positions to be cleared in the CSR.

high in rs1 will cause the corresponding bit to be cleared in the CSR

CSRR rd, csr, is encoded as CSRRS rd, csr, x0

CSRW csr, rs1, is encoded as CSRRW x0, csr,rs1

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